UP Xtreme i11 Board
The UP Xtreme i11 board (UP Xtreme i11) is an x86 maker board based on Intel platform Tiger Lake UP3. The UP boards are used in IoT, industrial automation, digital signage areas, etc.
Prerequisites
SBL supports UP Xtreme i11 maker board. To start developing SBL, the following equipment, software and environments are required:
Custom SPI flashing cable (instructions).
USB 2.0 pin header cable for debug uart output. OR Make your own.
DediProg SF100 or SF600 programmer
Linux host (see Building on Linux for details)
Internet access
Board Setup
Before You Start
Warning
As you plan to reprogram the SPI flash, it’s a good idea to backup the pre-installed BIOS image first.
Boot the board and enter BIOS setup menu to get familiar with the board features and settings.
Early boot serial debug console can be reached via UART2 located on CN11 header on the UP Xtreme i11 board. Make sure you can observe serial output message running the factory BIOS first.
Note
To make your own UART debug adapter by direct wiring, refer to CN11 Header Pinout for UART2:
Pin |
Signal |
8 |
GND |
9 |
UART_RX |
10 |
UART_TX |
Building
UP Xtreme i11 board is based on Intel Tiger Lake. To build:
python BuildLoader.py build tgl
The output images are generated under Outputs
directory.
Stitching
Stitch SBL images with factory BIOS image using the stitch tool:
python Platform/TigerlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/tgl/SlimBootloader.bin -o <SBL_IFWI_IMAGE_NAME> -p 0xAA000204
<BIOS_IMAGE> : Input file. Factory BIOS extracted from UP Xtreme i11 board.
<SBL_IFWI_IMAGE> : Output file. New IFWI image with SBL in BIOS region.
-p <value> : 4-byte platform data for platform ID (e.g. 04) and debug UART port index (e.g. 02).
Note
StitchLoader.py script works only if Boot Guard in the base image is not enabled, and the silicon is not fused with Boot Guard enabled. If Boot Guard is enabled, please use StitchIfwi.py script instead.
See Stitch Tool on how to stitch the IFWI image with SBL.
Slimbootloader binary for capsule
Creating Slimbootloader binary for capsule image requires the following steps:
Build SBL for UP Xtreme i11:
python BuildLoader.py build tgl
Run stitching process as described above to create a SBL IFWI binary sbl_upx11_ifwi.bin
:
python Platform/TigerlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/tgl/SlimBootloader.bin -o sbl_upx11_ifwi.bin -p 0xAA000204
Extract bios.bin
from SBL IFWI image:
python BootloaderCorePkg/Tools/IfwiUtility.py extract -i sbl_upx11_ifwi.bin -p IFWI/BIOS -o bios.bin
Generate capsule update image FwuImage.bin
:
python BootloaderCorePkg/Tools/GenCapsuleFirmware.py -p BIOS bios.bin -k KEY_ID_FIRMWAREUPDATE_RSA3072 -o FwuImage.bin
Triggering Firmware Update
Please refer to Firmware Update on how to trigger firmware update flow. Below is an example:
To trigger firmware update in SBL shell:
Copy
FwuImage.bin
into root directory on FAT partition of a USB keyBoot and press any key to enter SBL shell
Type command
fwupdate
from shellObserve SBL resets the platform and performs update flow. It resets multiple times to complete the update process.
Flashing
Flash the IFWI image to UP Xtreme i11 board using a SPI programmer. Header CN20 on the board should be used, see instructions for additional details.
Good Luck!